«Signal – Trigger» Converter of Harald Antes

«Signal – Trigger» Converter of Harald Antes

An actual copy of Yves Usson's Comparators module with minor changes and only one working section

Overview

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Bill of materials

Description

The incoming signals are summed up. Every time when the summed signal changes polarity (moving through zero) a trigger is generated. Moving from plus to minus generates a trigger at the negative trigger output, moving from minus to plus generates a trigger at the positive trigger output. Trigger length is about 1msec. The gate output stay high as long as the summed input signal stays positive. Trigger and gate voltage is +5V.

Files

Project schematics / «Signal – Trigger» Converter of Harald Antes
Title Version Creation date Copyright notice Software Download link
Плата версии 0.9

Плата версии 0.9

0.9 3/29/2020 Харальд Антес (Ив Уссон) DipTrace Schematics Download PDF
Панель версии 0.9

Панель версии 0.9

0.9 3/29/2020 Харальд Антес (Ив Уссон) DipTrace Schematics Download PDF

Bill of materials

Плата версии 0.9
# Value Quantity Designator Comment
Semiconductors
1 1N4148 6 D1, D2, D3, D4, D5, D6
2 TL084 1 U1
3 TL082 1 U2
Resistors
1 1k8 2 R1, R19
2 100k 11 R10, R11, R13, R14, R15, R17, R21, R26, R3, R4, R7
3 39k 1 R12
4 300 3 R16, R22, R5
5 6k8 1 R18
6 3k 2 R2, R20
7 10k 2 R23, R6
8 7k5 2 R24, R8
9 68k 2 R25, R9
Capacitors
1 10nF 2 C1, C2
2 10uF 2 C3, C6
3 .1uF 2 C4, C5
Inductances
1 Bead 2 L1, L2
Connecters
1 2.54/3P 3 J1, J2, J3
2 2.54/2P 1 J4
3 3.96/3P 1 J5
Панель версии 0.9
# Value Quantity Designator Comment
Semiconductors
1 Red LED 3mm 1 LED1
Variable Resistors
1 100k/Lin 1 VR1
Connecters
1 4mm Banana In 6 J1, J10, J2, J7, J8, J9
2 2.54/3P Female 3 J3, J4, J5
3 2.54/2P Female 1 J6
Harald Antes
Author:
Harald Antes

German SDIY enthusiast, Germany

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Knowledge Base Codex
Харальд Антес, 2015

Оригинальная принципиальная схема Преобразователя «Сигнал – Пусковой импульс»

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